PCF8582C-2
256 × 8-bit CMOS EEPROM with I 2 C-bus interface
Rev. 04 — 25 October 2004
Product data
1. Description
The PCF8582C-2 is a ?oating gate Electrically Erasable Programmable Read Only
Memory (EEPROM) with 2 kbits (256 × 8-bit) non-volatile storage. By using an
internal redundant storage code, it is fault tolerant to single bit errors. This feature
dramatically increases the reliability compared to conventional EEPROMs. Power
consumption is low due to the full CMOS technology used. The programming voltage
is generated on-chip, using a voltage multiplier.
Data bytes are received and transmitted via the serial I 2 C-bus. Up to eight
PCF8582C-2 devices may be connected to the I 2 C-bus. Chip select is accomplished
by three address inputs (A0, A1 and A2).
Timing of the E/W cycle is carried out internally, thus no external components are
required. Programming Time Control (PTC), Pin 7, must be connected to either V DD
or left open-circuit. There is an option of using an external clock for timing the length
of an E/W cycle.
2. Features
s Low power CMOS:
x 2.0 mA maximum operating current
x maximum standby current 10 μ A (at 6.0 V), typical 4 μ A
s Non-volatile storage of 2 kbits organized as 256 × 8-bit
s Single supply with full operation down to 2.5 V
s On-chip voltage multiplier
s Serial input/output I 2 C-bus
s Write operations:
x byte write mode
x 8-byte page write mode (minimizes total write time per byte)
s Read operations:
x sequential read
x random read
s Internal timer for writing (no external components)
s Internal power-on reset
s 0 kHz to 100 kHz clock frequency
s High reliability by using a redundant storage code
s Endurance: 1,000,000 Erase/Write (E/W) cycles at T amb = 22 ° C
s 10 years non-volatile data retention time
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